Coverage using Verilog

Coverage
1

Hi,

It is very straight forward approach to achieve functional coverage in system verilog.

Is there any way to achieve functional coverage in verilog?

Thanks

2

In reply to rajput7767:
Sure, you can do anything in Verilog that you can do in SystemVerilog. It’s just a simple matter of programming.

The covergroup construct in SystemVerilog is just a set of counters or flags that get set when sampling data matching some expression. I suppose you could create a function for each covergroup you want to sample that collects the bins of coverpoints.

But most of the difficult work comes after acquiring the data. You need to collect all those bins together so you can produce a report that shows what the total coverage metric is and points you to areas that are missing coverage.

If your test is really a suite of tests, then you also need to be able to merge the individual coverage data from each test into a collective coverage metric. You might want to rank your tests to shorten up your regression suite by eliminating redundant tests.

3

In reply to dave_59:

Thanks Dave. I understood the intention of your explanation.