For the question shown below, should this be understood to write a cover group for vector bit toggling? My question is how should I write coverage for the below?
Write coverage for a 4 bit address, all address bits have seen 0 ->1 once
bit [3:0] addr;
covergroup cg;
coverpoint addr {
bins sa = (0=>1);
}
endgroup
Please help me how to understand if all bits have toggled.
Thanks in advance.