I’m trying to write a cover point for a 128 bit logic variable. The cover point should be hit if any one of the bits transition from 1 → 0 → 1.
I know there is a way to create cover points for each of the bits and check if their value transition from 1 → 0 → 1. But I’m not interested in coverage for all 128 bits. If any one of the bits makes the transition, then I am good.
I think a follow up question I had was what if the transitions 1 => 0 => 1 were not happening on consecutive clocks, and the number of clocks between the transitions are not known before hand. In that case I’d have to write a cover property for each bit, and create an array of cover properties? Is there a way to merge results in that case?
If we want to check without bothering the no of clocks, means we have to store the previous value(upto my knowledge). and sampling the value of those three corresponding bis transition in that interested reg.
covergroup toggle_cg with function sample(bit[2:0] eachbit);
coverpoint eachbit {
bins toggle = [3'b101];
}
endgroup
toggle_cg t_cg;
bit [127:0] myvector[$];
bit [2:0] sequence;///// this is for covering 1 0 1 sequence
t_cg = new();
myvector.push_back(focused_reg);/// storing the register from every txn
if(myvector.size==3) begin
foreach(t_cg[ii])begin
sequence = {myvector[0][i],myvector[1][i],myvector[2][i]};
t_cg.sample(sequence);
end
myvector.pop_front();/// removing the first stored value
end