Basic coverage tricks

Coverage
,
1

Hi,
I have several basic coverage questions:

  1. Assume I have queue of bits (bit my_bits[$]). What is the syntax for covering this queue:
    a. my_bits sizes (1 to 10 for example)
    b. my_bits values (each index in queue was 1 and 0)
    c. my_bits all values (0 to 1024, for 10 bits)
  2. Assume I have 16 bit vector. I want to separate the covered values to 1024 bins. what is the easiest way for doing it?
  3. Is it possible to cover enumarations?
    For example, Assume I have this structure: bit my_bits[ACTION][$]
    Action is enumaration of ADD, MULT. queue is fixed length.
    I want to see each combination of (ACTION, my_bits[ACTION] value)
2

In reply to idol:

A covepoint can sample any integral value. That value could be a single variable, a function call, or any, integral expression. So to cover different size from 1 to 10, you can write

my_sizes: coverpoint my_bits.size() {
  bins sizes[] = {[1:10]};
}

When dealing with arrays, you have a few choices. Since you are only dealing with a maximum of 10 bits, you could pack the queue into a 10 bit vector

all_values: coverpoint 10'({<<{my_bits}}) {
  bins av[1024] = all_values;
}

Another option is creating an array of covergroups. See https://verificationacademy.com/forums/systemverilog/bitwise-toggle-coverage-bitvector#reply-45878

3

In reply to idol:

Hi,
Can you refer question #2?
(Assume I have 16 vector. I want to separate the covered values to 1024 bins. what is the easiest way for doing it?)