Are you an ASIC/IC, FPGA Verification Engineer or Manager interested in CDC Verification?
What Is CDC Protocol Verification, and Why You Absolutely Need It To Prevent Bugs in Your Silicon
Multi-clock designs are subject to metastability, which causes mismatches between traditional simulation and silicon reality. Adding synchronization structures is not sufficient for preventing CDC bugs in silicon. This web seminar explains the importance of CDC protocols for correct synchronizer operation. Through a set of detailed examples, we show how CDC protocol failure in clock domain crossings will lead to functional problems and silicon failure. We discuss the pros and cons of various approaches to verifying CDC protocols and we show how Questa® CDC automatically generates protocol assertions for a complete dynamic CDC verification methodology that includes simulation and formal analysis.
What You Will Learn:
- How metastability can lead to functional issues in silicon.
- Why synchronization structures alone are not sufficient to prevent CDC functional issues.
- How Questa® CDC enables you to eliminate CDC protocol issues caused by metastability.
Now available to view or download.