Now available on the Verification Academy, the June 2016 Issue of Verification Horizons.
- Articles include:
- Marking Milestones: In Life and in Technology
- How Formal Techniques Can Keep Hackers from Driving You into a Ditch
- Simplifying HDCP Verification Using Questa® VIP
- No RTL Yet? No Problem. UVM Testing a SystemVerilog Fabric Model
- Accelerating Networking Products to Market
- The Advantage of Using Mentor Graphics for the Physical Verification of FPGAs in Accordance with an Aerospace DO254 Methodology Flow
- Extending UVM Verification Models for the Analysis of Fault Injection Simulations
- Saving Time and Improving Quality with a Specification to Realization Flow
- Solve UVM Debug Problems with the UVM Vault