Registration is open for a Productivity & Coverage for UVM seminar on Tuesday, October 9th in Santa Clara.
Overview:
If you are a Design or Verification engineer or manager and want to understand better how UVM will benefit you, what effort it will take to adopt UVM, what resources are available to help, how they fit it into your current environment and if you have the right people to maximize its benefits, then attend this FREE one-day seminar that will cover all of this and more!
This seminar will be held at the Santa Clara Hilton with a Keynote Session presented by Harry Foster, Verification Academy Lead Subject Matter Expert & Chief Scientist Verification for Mentor Graphics DVT. Continental breakfast and a buffet lunch will be provided.
Attendees Will Learn:
- Keys and techniques for effective Verification Planning and Management for UVM.
- A staged approach for UVM adoption using UVM Express.
- Tools and techniques to track Design Requirements through verification.
- Tools and techniques to manage verification regression runs, track verification and simulation with a testplan, automatically analyze results, instantly understand status of projects, and analyze trends during verification.
- Best practices and tools to create your UVM testbench and capabilities of UVM Verification IP.
- Best practices and tools to effectively debug your UVM testbench alongside your design.
- How to automate, track and accelerate coverage closure.
- Complementing UVM with easy to use static tools for more comprehensive verification.
Date, Time and Location:
- Tuesday, October 9th
- 8:30 AM - 3:30 AM US/Pacific
- Hilton - Santa Clara
Learn more and register for this seminar.
* Registration is fulfilled on Mentor.com