The book SystemVerilog Assertions Handbook, 3rd Edition is now available
This book is an excellent reference in the process and application of SVA. It was created by four authors who came from very strong technical backgrounds, thus putting a lot of synergy in the creation of this book. This book has many tested examples to explain and demonstrates the concepts It also offers detailed rues about the language and guidelines for the proper usage of SVA.
SVA in your design process environment would significantly help in clarifying the detailed design requirements, in enhancing the design process, and in the verification process by detecting and isolating design errors. SVA is a proven technology in the industry.