UVM Express
UVM Express is a collection of techniques, coding styles and UVM usages that are designed to increase the productivity of functional verification. The techniques include raising the abstraction level of tests, writing tests using BFM function and task calls, adding functional coverage, and adding constrained-random stimulus generation. The following table can help you decide if UVM Express is right for you:
For those teams/projects involved in designing and verifying digital designs:
|
|
No |
Yes |
|
Do you have a full-time verification lead? |
Think about using UVM Express |
Consider using full UVM |
|
Do you have separate verification and design teams? |
Think about using UVM Express |
Consider using full UVM |
|
Are you already using a High-Level Verification Language? |
Think about using UVM Express |
Consider using full UVM |
The UVM Express Academy Module provides a video-based walk through the steps of UVM Express, while the UVM/OVM Online Methodology Cookbook provides a number of articles that provide a bit more detail and executable examples to help you get started.
UVM Express Course Module
UVM Express hosted by Rich Edelman
- Overview & Task Based BFMs
This session introduces UVM Express, talks about getting organized with test environments, and suggests creating BFMs (Bus Functional Models) with tasks in order to facilitate test writing.
- Functional Coverage
This session describes how to add functional coverage to an existing BFM based testbench, in order to check how well the tests are supporting the desired coverage.
- Constrained-Random Stimulus
This session describes how to add constrained-random stimulus generation to an existing BFM based testbench, in order to improve the productivity of the test writer, and to improve the quality of the coverage achieved.
Learn more about the UVM Express Module.
UVM Express Events
UVM Express - March Recipe of the Month
UVM Express Interview
Graham Bell from EDA Cafe interviews Tom Fitzpatrick and Harry Foster at DVCon 2012
UVM Express Resources
UVM Express Cookbook Recipes *
Learn from the UVM Express Guide. 
UVM Express Examples *
- Examples Download
This download demonstrates the steps for UVM Express adoption of the UVM. BFM and Tasks, Functional Coverage and Constrained-Random Stimulus.
UVM 1.1a Kit
- UVM 1.1a (tar.gz) - Accellera
UVM Express Discussion Forum
* Total Access account required
UVM Express FAQ
Q: Who should be using UVM Express?
A: Anyone currently not using an object-oriented verification methodology who is looking to adopt functional coverage and constrained-random stimulus without the time or inclination to learn all of UVM.
Q: Is UVM Express compatible with UVM?
A: Yes. UVM Express uses pre-built VIP in a simple environment to allow you to access UVM functionality without having to assemble a full UVM environment. You can expand to full UVM at your leisure.
Q: Does UVM Express require any additional libraries?
A: No. UVM Express uses the UVM 1.1a library from Accellera to facilitate the inclusion of VIP into your environment.
Q: Do I have to use full UVM VIP to realize a benefit from UVM Express?
A: No. The first step of organizing your existing environment to use a task-based SystemVerilog interface to communicate with your DUT will greatly improve the abstraction level of your test as well as the reusability of your tests. From there, it’s a simple operation to include VIP to add functional coverage and constrained-random stimulus.
Q: Can I use UVM Express if I don’t know object-oriented programming?
A: Yes. Although full UVM uses OOP to provide much of its functionality, the point of UVM Express is to hide these details from the user. As you become more comfortable with OOP, you can use inheritance and other OOP/UVM features to enhance your initial environment, but you can still get a lot done with your initial environment.